As a semiconductor device, there has been widely used a memory such as a flash memory which is comprised of floating gate and control gate. A memory cell serving as a smallest unit may include a tunnel oxide film (a first insulating film) formed by oxidizing the surface of a semiconductor substrate, a floating gate (a first poly-silicon film) formed on the tunnel oxide film, a dielectric film (a second insulating film) formed on the floating gate, and a control gate (a second poly-silicon film) formed on the dielectric film. Further, a semiconductor substrate is formed with a source area and a drain area under the tunnel oxide film, and the two areas are located on such positions that the floating gate is interposed therebetween. One (a first impurity area) of the source area and the drain area is connected through a connecting area (a third impurity area) to one (a second impurity area) of the source area and the drain area of an adjacent area.
Here, there is a problem that can be described as follows, i.e., if the third impurity area is formed at the same time as the above first and second impurity areas in accordance with a depth and a impurity concentration required by the first and second impurity areas, the resistance of the connecting area (the third impurity area) will become high, hence retarding the transmission of a signal.